Subject: branch prediction in single dispatch implementation
From: Mayur Naik (mhn@hotbot.com)
Date: Wed May 10 2000 - 09:59:27 PDT
Hello
I have a minor query concerning less-than tests used in the single dispatch implementation in [CC99].
I feel you should perform a less-than test on an ID 'x' if the sum of frequencies of IDs less than x is greater than that of IDs greater than or equal to x, and a greater-than test on ID 'x-1' otherwise.
This would facilitate branch prediction in a RISC processor. I think the cost of a compare-and-branch instruction in a typical RISC processor is 'c' cycles if the test succeeds (i.e., if the branch is not taken) and 'c + delta' cycles otherwise, but I'm not sure.
If this happens to be the case, I understand that the increase in speed will be marginal, but I'm curious to know whether there is any particular reason why you choose to use only < tests.
Thanks for your time.
-- Mayur
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